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Lithography, Deposition, and Etch Market Analysis for Flip Chip/WLP Manufacturing

 

 

TABLE OF CONTENTS

 

Chapter 1 

Introduction 

1-1

 

 

 

Chapter 2 

Executive Summary

2-1

 

 

 

Chapter 3 

Flip Chip/WLP Issues and Trends

3-1

 

 

 

3.1

Introduction

3-1

3.2

Wafer Bumping

3-6

3.2.1

Solder Bumps

3-7

3.2.1.1 

Metallurgy

3-7

3.2.1.2 

Deposition Of UBM

3-11

3.2.1.3 

Sputter Etching

3-12

3.2.1.4 

Photolithography

3-13

3.2.1.5 

Solder Deposition

3-14

3.2.1.6 

Resist Strip

3-15

3.2.1.7 

UBM Wet Etch

3-16

3.2.1.8 

Reflow

3-16

3.2.1.9 

Flux Issues

3-18

3.2.2

Gold Bumps

3-19

3.2.2.1 

Bump Processing

3-19

3.2.2.2 

Bonding

3-21

3.2.2.3 

Coplanarity

3-25

3.2.2.4 

Conductivity

3-26

3.2.2.5 

Thermal Properties

3-26

3.2.2.6 

Size

3-27

3.2.2.7 

Reliability

3-27

3.2.2.8 

Cost Issues

3-28

3.2.3

Copper Pillar Bumps

3-31

3.2.4

Copper Stud Bumping

3-34

3.2.5

 C4NP

3-39

3.3

Wafer Level Packaging

3-45

3.4

Pad Redistribution

3-52

3.5

Wafer Bumping Costs

3-56

3.5.1

Wafer Redistribution And Wafer Bumping Costs

3-57

3.5.2

WLCSP Hidden Costs

3-58

3.5.3

WLCSP Cost Per Good Die

3-59

3.5.4

Wafer-Level Underfill Costs

3-60

 

 

 

Chapter 4 

Lithography Issues And Trends

4-1

 

 

 

4.1

Issues

4-1

4.1.1

Technical Performance

4-2

4.1.2

Capital Investment

4-2

4.1.3

Cost Of Consumables

4-2

4.1.4

Throughput

4-2

4.1.5

Ease Of Use

4-3

4.1.6

Flexibility

4-3

4.1.7

Equipment Support

4-3

4.1.8

Resolution

4-3

4.1.9

Solder Bumping Capabilities

4-4

4.1.10

Gold Bumping Capabilities

4-5

4.2

Exposure Systems

4-6

4.2.1

Introduction

4-6

4.2.1.1 

Reduction Steppers

4.6

4.2.1.2 

Full-Field Projection

4-8

4.2.1.3 

Mask Aligners

4-13

4.2.1.4 

1X Steppers

4-13

4.3

Competitive Technologies

4-16

4.3.1

Inkjet Printing

4-16

4.3.2

Stencil/Screen Printing

4-18

4.3.3

Electroless Metal Deposition

4-22

 

 

 

Chapter 5 

UBM Etch Issues And Trends

5-1

 

 

 

5.1

Introduction

5-1

5.2

Technology Issues And Trends

5-2

5.2.1

Process Flow

5-2

5.2.2

Etch Process

5-4

5.2.3

Etch Chemistry

5-8

5.3 

Batch Versus Single-Wafer Etching

5-16

 

 

 

Chapter 6 

Metallization Issues and Trends

6-1

 

 

 

6.1 

Introduction

6-1

6.2

Sputtering Metallization

6-3

6.2.1 

Gold Bump

6-3

6.2.2 

Solder Bumping

6-4

6.2.2.1 

T i / Cu and TiW / Cu

6-5

6.2.2.2 

Al / NiV / Cu

6-5

6.2.2.3 

T i / N i (V) and TiW / Ni ( V )

6-6

6.2.2.4 

Cr / Cr-Cu / Cu

6-6

 

 

 

Chapter 7 

Market Analysis

7-1

 

 

 

7.1

Market Drivers For Flip Chip And WLP

7-1

7.1.1

WLP For Small Die

7-2

7.1.2

WLP For Medium Die

7-2

7.1.3

WLP For Large Die

7-3

7.2

Market Opportunities

7-5

7.3

Challenges

7-7

7.4

Flip Chip Market

7-10

7.5

Lithography Market

7-13

7.5.1

Aligners Vs. Steppers

7-13

7.5.2

Market Analysis

7-14

7.6

Wet Etch Market

7-19

 

 

 

 

TABLES

 

 

 

 

3.1

Common UBM Stacks For Solder And Gold Bumping

3-8

3.2

Solder Bumping Guidelines

2-10

3.3

Gold Bumping Guidelines

3-24

3.4

Copper Bumping Guidelines

3-33

3.5

Comparison Of Solder Bumping Processes

3-42

4.1

Key Challenges For WLP Lithography

4-12

4.2

Lithography Tools By Vendor

4-15

5.1

UBM Film Etchants

5-10

5.2

Advantages Of Spin Processing

5-14

6.1

Common UBM Stacks For Gold And Solder Bumping

6-2

7.1

WLP Demand by Device (Units)

7-13

7.2

WLP Demand by Device (Wafers)

7-14

7.3

Comparison Of Mask Aligners Versus Steppers

7-17

7.4

Worldwide Lithography Forecast

7-18

7.5

Worldwide Forecast For UBM Etch Tools

7-23

7.6

Worldwide Forecast For UBM Etchants

7-25

 

 

 

 

FIGURES

 

 

 

 

3.1

C4 Chip Connections

3-3

3.2

Wafer Bump Technology Roadmap

3-4

3.3

Comparison Of Copper Pillar, Flip Chip, And WLP

3-5

3.4

Solder Bumping Process

3-9

3.5

Three Process Flows For Solder Bumping

3-17

3.6

Gold Bumping Process

3-23

3.7

Cost Per Gold Bumped Wafer

3-29

3.8

Copper Stud Bump

3-35

3.9

Breakdown Of Stud Bumping Costs

3-38

3.10

C4NP Process Description

3-40

3.11

Pillar-WLPCSP Process

3-50

3.12

Pad Redistribution Process

3-53

4.1

Laser-Projection Imaging

4-10

4.2

Solder Jet Technology

4-17

4.3

Principle Of Screen  Printing

4-20

4.4

Principle Of Inkjet Printing

4-21

4.5

Electroless Under Bump Metallization

4-23

5.1

Electroplated Solder Bumping Process

5-3

7.1

WLP Applications By Die Size

7-4

7.2

WLP Applications

7-6

7.3

Flip Chip Market

7-11

7.3

Flip Chip Market

7-12

7.4

Historic Lithography Market Shares

7-19

7.5

Lithography Market Shares

7-20

7.5

Wet Etch Market Shares

7-24